Another key feature is FEC or low-latency forward error correction, as this was implemented to maintain data integrity. What this means is that twice the data can be sent per clock cycle for 64GT/s, or twice that of PCIe 5.0. PCIe 6.0 will be the first PCIe standard to use PAM-4 encoding, something it shares with GDDR6 memory among other standards. What this means is that companies can now start to implement PCIe 6.0 into their products, to make sure they're compliant with the draft spec, since no additional functional changes will be made, unless something major is discovered. Back in June of 2019, the PCI-SIG announced that work had started on PCIe 6.0 and some two years and four months later, PCIe 6.0 has reached version 0.9, which equals draft spec.
